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ECE 222 Laboratory 1

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University of Rochester

Academic year: 2018/2019

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ECE 222

14 February 2019

Lab 1: HSPICE Simulation

Part 1: HSPICE Setup

For the very first part of this lab, I set up HSPICE using the basic instructions provided via Blackboard, and logged in via SSH to run my netlists. I also worked with my friend Veerendra to trouble shoot some of the issues encountered within this lab.

Part 2: Characterize Diodes

First, I established the diode circuit by calling the diode from the sedra_lib file, and constructed a basic circuit with the diode and a voltage source. The HSICE code was the following:

.include 'sedra_mod_lib'

Diode D1 1 0 D1N v1 1 0 DC 5V

.DC v1 -20 2.

.plot v(v1) .plot I(d1)

.op .option post .END

The voltage is varied from -20 to 2 volts to test the diode IV curve of the diode. Below is the diode circuit and the IV curve for the diode:

Figure 1: Diode Circuit

Figure 3: Diode IV curve for (top) 100, 85, 55, 0, and 27 degrees C (bottom)

While the graph looks a lot like the data sheet, it becomes difficult to see the curve as it reaches the threshold voltage. It is however certainly consistent with typical diode behavior, with no current flow until the diode reaches threshold voltage.

To graph the different temperatures, I used the .TEMP function to make separate graph files for 27, 0, 55, 85, and100. Overall, there was not a lot of variance between the temperatures, as can be seen in the graph below:

Figure 2: Diode IV curve

Vds d gd 0

M1 d g gd gd NMOS0P5 W=20um L=0

AS=20E-12 AD=20E-12 PS=22E-6 PD=22E-

Vvdd vdd 0 3v Vgd gd 0 0v

.DC Vds 0 3 0 Vgs 0 3 0. .PROBE DC I(M1) .print VTH(M1) .print VDSAT(M1) .end

The general circuit looked like the following:

The graph for the resulting NMOS transistor was as follows:

Figure 4: NMOS circuit

Using the .DC Vin1 0 3 0 Vin2 0 3 0 sweep function as specified in the lab guide, I generated the graph above from a NMOS transistor with the specified values.

To find the Vdsat and the Vt, I employed the built-in HSPICE functions for just that purpose:

.print VTH(M1) .print VDSAT(M1)

Figure 5: NMOS IV graph

Figure 6: Vdsat

.DC Vin 1 2 1 Vgs 0 3 0. .AC LIN 100 10G 200G

.PROBE DC I(M1) .print gain=PAR('I(Vin)/I(Vdd)') .option post

.end

For the next part, I completed all of the above steps, but this time for the PMOS transistor. First, I again utilized the parameter function to make the process simpler:

.include 'sedra_mod_lib'

like #define .param power= .OPTION POST

.global Vdd gnd Vdd Vdd gnd 'Supply'

*PMOS M1 ds gs Vdd Vdd PMOS0P5 W=20um L=0

AS=20E-12 AD=20E-12 PS=22E-6 PD=22E-

vds Vdd ds 'power' vgs Vdd gs 'power'

.DC Vds 0 3 0 Vgs 0 3 0. .PROBE DC I(M1) .print VTH(M1) .print VDSAT(M1)

.END

This created the following circuit, with the graph below:

Next, to find Vt and Vdsat, I again used the built in HSPICE functions for MOSFET transistors:

.print VTH(M1) .print VDSAT(M1)

Again, I was able to graph the result:

Figure 8: IV Curves for PMOS

Figure 7: PMOS circuit

For the last part of the lab, I created the following circuit from the lab guide:

Using the diodes from the ‘sedra_lib’ file, I constructed the circuit with the following code:

Input digital signal .include 'sedra_mod_lib'
Diode D1 2 0 D1N C1 1 2 1u D2 3 2 D1N C2 3 0 1u V1 1 0 AC SIN(0 10V 1k 0 0 0)

.TRAN 1ns 1000ns START=1ns

** Output .TRAN (1ns) (10ms) .PROBE TRAN v(D1)

.op .option post .END

Initially I had some trouble getting the graph to work, but I found the .TRAN (start) (end) function to be very useful for solving this. I also had a problem where one of my diodes was not properly biased, as it was placed in the circuit in the wrong direction. Upon resolving these issues, I then measured the voltage at nodes two (V2) and three (Vout), which resulted in the following graphs:

Figure 10: Voltage Doubler Circuit

Figure 11: V2 (top) and Vout (bottom)

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