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VLSI-7 - Lecture notes 7
Computer-Aided Design for VLSI Design (TA10310803)
National Taiwan University
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7 : SPI CE Sim ula t ion
Introduction to SPICE
DC Analysis
Transient Analysis
Subcircuits
Optimization
Power Measurement
Logical Effort Characterization
I nt roduc t ion t o SPI CE
Simulation Program with Integrated Circuit Emphasis
– Developed in 1970’s at Berkeley
– Many commercial versions are available
– HSPICE is a robust industry standard
• Has many enhancements that we will use
Written in FORTRAN for punch-card machines
– Circuits elements are called cards
– Complete description is called a SPICE deck
Ex a m ple : RC Circ uit
- rc
- David_Harris@hmc 2/2/
- Find the response of RC circuit to rising input
*------------------------------------------------
- Parameters and models *------------------------------------------------ .option post
*------------------------------------------------
- Simulation netlist *------------------------------------------------ Vin in gnd pwl 0ps 0 100ps 0 150ps 1 800ps 1. R1 in out 2k C1 out gnd 100f
*------------------------------------------------
- Stimulus *------------------------------------------------ .tran 20ps 800ps .plot v(in) v(out) .end
R1 = 2K
C1 = 100fF
Vin
- Vout
Re sult (T e x t ua l)
legend:a: v(in) b: v(out) (ab ) 0. 500 1 1 2 time v(in) 0. 0. -+ + + + + 2 ------+------+------+------+------+------+------+------+- 20 0. 40 0. 22 + + + + + + + + + + + + + + + + 60 0. 80 0. 22 + + + + + + + + + + + + + + + + 100 0. 120 720 + 2 b + + + + + + + + + + a+ + + + + + 140 1 + 160 1 + +b + + + + + b + + + + + +a+ + + a + 180 1 + + 200 1 -+------+------+b+ + + + + +b-----+------+------+------+------+aa-----+-+ 220 1 + + + 240 1 + + + +b+ + + + +b + + + +aa + + 260 1 + + + + 280 1 + + + + bb+ + + ++ + + +aa + + 300 1 + + + + +320 1 + + + + + bb + + ++ + +aa + + 340 1 + + + + + 360 1 + + + + + b+ + +b + +aa + + 380 1 + + + + + +400 1 -+------+------+------+------+------+--bb---+------++ +aa-----+-+ 420 1 + + + + + + 440 1 + + + + + + bb+ ++ +aa + + 460 1 + + + + + + 480 1 + + + + + + b+ +b +aa + + 500 1 + + + + + + +520 1 + + + + + + +bb ++aa + + 540 1 + + + + + + + 560 1 + + + + + + + bb ++aa + + 580 1 + + + + + + + 600 1 -+------+------+------+------+------+------+---bb--++aa-----+-+ 620 1 + + + + + + + 640 1 + + + + + + + bb++aa + + 660 1 + + + + + + + 680 1 + + + + + + + bb++aa + + 700 1 + + + + + + + 720 1 + + + + + + + bb++aa + + 740 1 + + + + + + + 760 1 + + + + + + + bb++aa + + 780 1 + + + + + + + 800 1 -+------+------+------+------+------+------+------baba-----+-+ + + + + +
Sourc e s
DC Source
####### Vdd vdd gnd 2.
Piecewise Linear Source
####### Vin in gnd pwl 0ps 0 100ps 0 150ps 1 800ps 1.
Pulsed Source
####### Vck clk gnd PULSE 0 1 0ps 100ps 100ps 300ps 800ps
PULSE v1 v2 td tr tf pw per
v
v
td tr pw tf
per
SPI CE Ele m e nt s
Letter Element
R Resistor
C Capacitor
L Inductor
K Mutual Inductor
V Independent voltage source
I Independent current source
M MOSFET
D Diode
Q Bipolar transistor
W Lossy transmission line
X Subcircuit
E Voltage-controlled voltage source
G Voltage-controlled current source
H Current-controlled voltage source
F Current-controlled current source
DC Ana lysis
- mosiv
*------------------------------------------------
- Parameters and models *------------------------------------------------ .include '../models/tsmc180/models' .temp 70 .option post
*------------------------------------------------
- Simulation netlist *------------------------------------------------ *nmos Vgs g gnd 0 Vds d gnd 0 M1 d g gnd gnd NMOS W=0 L=0
*------------------------------------------------
- Stimulus *------------------------------------------------ .dc Vds 0 1 0 SWEEP Vgs 0 1 0. .end
Vgs Vds
Ids
4/
I -V Cha ra c t e rist ic s
Vds
0 0 0 0 1 1 1.
Ids (A)
0
50
100
150
200
250
Vgs = 1.
Vgs = 1.
Vgs = 1.
Vgs = 0.
Vgs = 0.
nMOS I-V
–Vgs dependence
– Saturation
T ra nsie nt Ana lysis
inv
Parameters and models *------------------------------------------------ .param SUPPLY=1. .option scale=90n .include '../models/tsmc180/models' .temp 70 .option post
Simulation netlist *------------------------------------------------ Vdd vdd gnd 'SUPPLY' Vin a gnd PULSE 0 'SUPPLY' 50ps 0ps 0ps 100ps 200ps M1 y a gnd gnd NMOS W=4 L=
- AS=20 PS=18 AD=20 PD= M2 y a vdd vdd PMOS W=8 L=
- AS=40 PS=26 AD=40 PD=
- Stimulus *------------------------------------------------ .tran 1ps 200ps .end
a
y
4/
8/
T ra nsie nt Re sult s
(V)
t(s)
0 50p 100p 150p 200p
v(a)
v(y)
tpdf = 12ps tpdr = 15ps
tf = 10ps
tr = 16ps 0.
Unloaded inverter
– Overshoot
– Very fast
edges
FO4 I nve rt e r De la y
fo4
Parameters and models *---------------------------------------------------------------------- .param SUPPLY=1. .param H= .option scale=90n .include '../models/tsmc180/models' .temp 70 .option post
Subcircuits *---------------------------------------------------------------------- .global vdd gnd .include '../lib/inv'
Simulation netlist *---------------------------------------------------------------------- Vdd vdd gnd 'SUPPLY' Vin a gnd PULSE 0 'SUPPLY' 0ps 100ps 100ps 500ps 1000ps X1 a b inv * shape input waveform X2 b c inv M='H' * reshape input waveform
FO4 I nve rt e r De la y Cont.
X3 c d inv M='H2' * device under test X4 d e inv M='H3' * load x5 e f inv M='H**4' * load on load
- Stimulus *---------------------------------------------------------------------- .tran 1ps 1000ps .measure tpdr * rising prop delay
- TRIG v(c) VAL='SUPPLY/2' FALL=
- TARG v(d) VAL='SUPPLY/2' RISE= .measure tpdf * falling prop delay
- TRIG v(c) VAL='SUPPLY/2' RISE=
- TARG v(d) VAL='SUPPLY/2' FALL= .measure tpd param='(tpdr+tpdf)/2' * average prop delay .measure trise * rise time
- TRIG v(d) VAL='0*SUPPLY' RISE=
- TARG v(d) VAL='0*SUPPLY' RISE= .measure tfall * fall time
- TRIG v(d) VAL='0*SUPPLY' FALL=
- TARG v(d) VAL='0*SUPPLY' FALL= .end
Opt im iza t ion
HSPICE can automatically adjust parameters
– Seek value that optimizes some measurement
Example: Best P/N ratio
– We’ve assumed 2:1 gives equal rise/fall delays
– But we see rise is actually slower than fall
– What P/N ratio gives equal delays?
Strategies
– (1) run a bunch of sims with different P size
– (2) let HSPICE optimizer do it for us
P/N Opt im iza t ion
fo4opt
Parameters and models *---------------------------------------------------------------------- .param SUPPLY=1. .option scale=90n .include '../models/tsmc180/models' .temp 70 .option post
Subcircuits *---------------------------------------------------------------------- .global vdd gnd .include '../lib/inv'
Simulation netlist *---------------------------------------------------------------------- Vdd vdd gnd 'SUPPLY' Vin a gnd PULSE 0 'SUPPLY' 0ps 100ps 100ps 500ps 1000ps X1 a b inv P='P1' * shape input waveform X2 b c inv P='P1' M=4 * reshape input X3 c d inv P='P1' M=16 * device under test
VLSI-7 - Lecture notes 7
Course: Computer-Aided Design for VLSI Design (TA10310803)
University: National Taiwan University
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